The CXL-standard DRAM memory expander will allow a server platform in data centers and enterprise servers to add new layers of short-term memory capacity compatible with a processor chip without unnecessary costs and complexities, as opposed to a chip architecture solely composed of memory chips under standards such as Double Data Rate 5.
The conventional DDR-based chip design, without the CXL memory interface interconnecting itself with DDR memory chips, limits memory capacity scaling to within the tens of terabyte range, according to the South Korean tech giant.
Samsung said in a statement the CXL-based memory chip is key for servers to handling gigantic amount of data workloads for the metaverse, AI and big data.
“CXL DRAM will become a critical turning point for future computing structures by substantially advancing AI and big data services, as we aggressively expand its usage in next-generation memory architectures including software-defined memory,” Park Cheol-min, vice president of memory global sales and marketing at Samsung Electronics, said in a statement.
This is a step up for the company’s move to standardize CXL. Since 2019, Samsung has been collaborating with data center, server and chipset makers to develop next-generation interface technology by forming the CXL Consortium. Samsung’s Park is a member on the CXL Consortium’s Board of Directors.
Samsung is the first chipmaker to have unveiled the CXL-based chip in the industry in 2021. The new product unveiled Tuesday features four times the memory capacity and one-fifth the system latency of Samsung’s previous CXL offering.